Gate Circuits

Gate Circuits
NAND Gates can be used as the heart of many electronic circuits apart from the logic circuits for which the package was designed.   Here is a NAND gate version of the rain alarm described earlier.   The ‘4011B’ chip is a CMOS device which has a very high input impedance and can operate at convenient battery voltages (3 to 15 Volts):

This circuit is comprised of a rain sensor, two astable multivibrators and a power-driver feeding a loudspeaker:

    1. The rain sensor is a wired-up strip board or similar grid of interlaced conductors, forming a voltage-divider across the battery rails.
    1. The output voltage from this, at point ‘A’ in the circuit diagram, is normally low as the strip board is open-circuit when dry.   This holds the first NAND gate locked in the OFF state, preventing the first astable from oscillating.   This first astable is colour-coded blue in the diagram.   Its frequency (the pitch of the note it produces) is governed by the values of the 47K resistor and the 1 microfarad capacitor.   Reducing the value of either of these will raise the frequency (note pitch).   If rain falls on the sensor, the voltage at point ‘A’ goes high letting the astable run freely.   If the voltage at ‘A’ does not rise sufficiently when it rains, increase the value of the 1M resistor.
    1. The output of the first astable is a low voltage when the sensor is dry.   It is taken from point ‘B’ and passed to the gating input of the second astable, holding it in its OFF state.   The speed of the second astable is controlled by the value of the 470K resistor and the 0.001 microfarad capacitor.   Reducing the value of either of these will raise the pitch of the note produced by the astable.   The rate at which this astable operates is very much higher than the first astable.
      When it starts to rain, the voltage at point ‘

A

      ’ rises, letting the first astable oscillate.   As it does so, it turns the second astable on and off in a steady rhythmic pattern.   This feeds repeated bursts of high speed oscillations from the second astable to point ‘

C

      ’ in the diagram.
  1. The Darlington-pair emitter-follower transistors cause the voltage at point ‘D’ to follow the voltage pattern at point ‘C’ (but 1.4 Volts lower voltage due to the 0.7 Volts base/emitter voltage drop for each transistor).   The high gain of the two transistors ensures that the output of the second oscillator is not loaded unduly.   These power-driver transistors place the output voltage across an eighty ohm loudspeaker, padded with a resistor to raise the overall resistance of the combination.   The voltage pattern produced is shown at point ‘D’ and is an attention-grabbing sound.

 

So, why does this circuit oscillate?:


The circuit will not oscillate if the gating input is low, so assume it to be high.   Take the moment when the output of gate 2 is low.   For this to happen, the inputs of gate 2 have to be high.   As the output of gate 1 is wired directly to the inputs of gate 2, it must be high, and for that to be true, at least one of its inputs must be low.   This situation is shown on the right.

There is now a full voltage drop between point ‘A’ and point ‘B’.   The 47K resistor and the capacitor are in series across this voltage drop, so the capacitor starts to charge up, progressively raising the voltage at point ‘C’.   The lower the value of the resistor, the faster the voltage rises.   The larger the value of the capacitor, the slower the voltage rises.

When the voltage at point ‘C’ rises sufficiently, the 100K resistor raises the input voltage of gate 1 far enough to cause it to change state.   This creates the following situation:


Now, the voltage across ‘A’ to ‘B’ is reversed and the voltage at point ‘C’ starts to fall, its rate governed by the size of the 47K resistor and the 1 microfarad capacitor.   When the voltage at point ‘C’ falls low enough, it takes the input of gate 1 low enough (via the 100K resistor) to cause gate 1 to switch state again.   This takes the circuit to the initial state discussed.   This is why the circuit oscillates continuously until the gating input of gate 1 is taken low to block the oscillation.

Now, here is a NAND gate circuit for a sequential on/off switch:


This circuit turns the Light Emitting Diode on and off repeatedly with each operation of the press-button switch.   When the on/off switch is closed, capacitor ‘C1’ holds the voltage at point ‘A’ low.   This drives the output of gate 1 high, which moves the inputs of gate 2 high via the 100K resistor ‘R1’.   This drives the voltage at point ‘B’ low, turning the transistor off, which makes the LED stay in its off state.   The low voltage at point ‘B’ is fed back via the 100K resistor ‘R2’ to point ‘A’, keeping it low.   This is the first stable state.

As the output of gate 1 is high, capacitor ‘C2’ charges up to that voltage via the 2M2 resistor.   If the press-button switch is operated briefly, the high voltage of ‘C2’ raises the voltage of point ‘A’, causing gate 1 to change state, and consequently, gate 2 to change state also.   Again, the high voltage at point ‘B’ is fed back to point ‘A’ via the 100K resistor ‘R2’, keeping it high, maintaining the situation.   This is the second stable state.   In this state, point ‘B’ has a high voltage and this feeds the base of the transistor via the 4.7K resistor, turning it on and lighting the LED.

In this second state, the output of gate 1 is low, so capacitor ‘C2’ discharges rapidly to a low voltage.   If the press-button switch is operated again, the low voltage of ‘C2’ drives point ‘A’ low again, causing the circuit to revert to its original stable state.

We could, if we wished, modify the circuit so that it would operate for three or four minutes after switch-on but then stop operating until the circuit was turned off and on again.   This is accomplished by gating one of the gates instead of just using both as inverters.   If we gated the second gate, then the LED would be left permanently on, so we will modify the first gate circuit:


This circuit operates exactly the same way as the previous circuit if, and only if, the voltage at point ‘C’ is high.   With the voltage at point ‘C’ high, gate 1 is free to react to the voltage at point ‘A’ as before.   If the voltage at point ‘C’ is low, it locks the output of gate 1 at the high level, forcing the output of gate 2 to the low level and holding the LED off.

When the circuit is first powered up, the new 100 microfarad capacitor ‘C3’ is fully discharged, which pulls the voltage at point ‘C’ to nearly + 9 Volts.   This allows gate 1 to operate freely, and the LED can be toggled on and off as before.   As time passes, the charge on capacitor ‘C3’ builds up, fed by the 2M2 resistor.   This causes the voltage at point ‘C’ to fall steadily.   The rate of fall is governed by the size of the capacitor and the size of the resistor.   The larger the resistor, the slower the fall.   The larger the capacitor, the slower the fall.   The values shown are about as large as are practical, due to the current ‘leakage’ of ‘C3’.

After three or four minutes, the voltage at point ‘C’ gets driven low enough to operate gate 1 and prevent further operation of the circuit.   This type of circuit could be part of a competitive game where the contestants have a limited time to complete some task.

Gates can also be used as amplifiers although they are not intended to be used that way and there are far better integrated circuits from which to build amplifiers.   The following circuit shows how this can be done:

This circuit operates when there is a sudden change in light level.   The previous light-level switching circuit was designed to trigger at some particular level of increasing or decreasing level of lighting.   This is a shadow-detecting circuit which could be used to detect somebody walking past a light in a corridor or some similar situation.

The voltage level at point ‘A’ takes up some value depending on the light level.   We are not particularly interested in this voltage level since it is blocked from the following circuitry by capacitor ‘C1’.   Point ‘B’ does not get a voltage pulse unless there is a sudden change of voltage at point ‘A’, i.e. there is a sudden change in light level reaching the light-dependent resistor ORP12.

The first gate amplifies this pulse by some fifty times.   The gate is effectively abused, and forced to operate as an amplifier by the 10M resistor connecting its output to its input.   At switch-on, the output of gate 1 tries to go low.   As its voltage drops, it starts to take its own inputs down via the resistor.   Pushing the voltage on the inputs down, starts to raise the output voltage, which starts to raise the input voltage, which starts to lower the output voltage, which ……   The result is that both the inputs and the output take up some intermediate voltage (which the chip designers did not intend).   This intermediate voltage level is easily upset by an external pulse such as that produced by the ORP12 through capacitor ‘C1’.   When this pulse arrives, an amplified version of the pulse causes a voltage fluctuation at the output of gate 1.

This voltage change is passed through the diode and variable resistor to the input of gate 2.   Gates 2 and 3 are wired together as a makeshift Schmitt trigger in that the output voltage at point ‘D’ is fed back to point ‘C’ via a high value resistor.   This helps to make their change of state more rapid and decisive.   These two gates are used to pass a full change of state to the output stage transistor.   The variable resistor is adjusted so that gate 2 is just about to change state and is easily triggered by the pulse from amplifier gate 1.   The output is shown as an LED but it can be anything you choose.   It could be a relay used to switch on some electrical device, a solenoid used to open a door, a counter to keep track of the number of people using a passageway, etc. etc.   Please note that an operational amplifier chip (which will be described later) is a far better choice of IC for a circuit of this type.   A gate amplifier is shown here only to show another way that a gate can be utilised.

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